# Control-flow Enforcement (CET)

Architecture reference: Feex

Also called CET

CET, Control-flow Enforcement Technology, adds hardware mechanisms for protecting control flow, principally shadow stacks and indirect branch tracking. Hardware support and active protection in a particular process are different states.

## What you need to know

CET, Control-flow Enforcement Technology, adds hardware mechanisms for protecting control flow, principally shadow stacks and indirect branch tracking. Hardware support and active protection in a particular process are different states.

## How it works

Shadow stacks maintain protected return-address state, while indirect branch tracking constrains destinations of tracked indirect branches. They address different control-flow transfers and have separate enumeration and enablement. The OS, loader, application binary and libraries participate in making a protected execution environment work.

## Where it is useful

A suitably built application can run with an OS-managed shadow stack so a mismatched return address triggers the defined exception rather than silently redirecting execution. Compatibility policy may differ for legacy modules and user-mode versus supervisor-mode protection.

## How to check support and enablement

Check CPUID.07H.00H:ECX bit 7 for shadow-stack capability and EDX bit 20 for indirect branch tracking, then inspect the OS's documented process protection status. An available CPU bit alone cannot establish enforcement for a running program.

Capability, enablement and enforcement must be checked separately. A processor can support a protection while the OS, application or virtual-machine policy does not activate it. A database support field is not an attestation of a running system.

## What the feature does not establish

A CET field does not prove both subfeatures are present or enabled. CET does not make a binary trustworthy, prevent every memory corruption bug or replace updates. Disabling a protection globally is not a routine fix for an application crash.

## Compatibility and performance in practice

Keep the OS, firmware and affected runtime current. If a protection exposes a compatibility problem, use vendor diagnostics and supported updates first. A broad protection toggle can affect unrelated applications and should follow an explicit deployment and recovery policy.

## A practical verification checklist

1. Record the exact processor or platform model and the application, OS and runtime versions involved. Preserve the wording of the actual error or requirement.
2. Check the manufacturer reference for that exact model, then inspect the effective capability and enabled state in the environment where the program runs.
3. Compare every requirement of the selected binary or backend. A similarly named feature, alias or broad technology label is not enough.
4. Confirm the application selected the intended implementation. Use its documented diagnostics and a supported fallback when requirements are not met.
5. Make one supported change at a time and repeat the same workload. Keep the original configuration and recovery path available.

## If the feature is listed but software cannot use it

Start with the exact failing component. A hardware database describes recorded capability; the operating system or hypervisor can expose a different effective environment. An illegal-instruction error also needs investigation of the actual faulting instruction and binary build, because corruption or an unrelated unsupported instruction can produce a similar symptom.

Install the application, driver or runtime version supported for the exact platform, and use the vendor's documented baseline or fallback build if needed. A software update cannot create an instruction that the processor lacks. Firmware and security-policy changes should follow the system manufacturer's procedure and a recovery plan rather than a generic optimization recipe.

## Related features and useful distinctions

[CET-IBT](https://feex.it/wiki/hardware/system/cet-ibt/) · [CET shadow stacks](https://feex.it/wiki/hardware/system/cet-ss/) · [Execute Disable (NX)](https://feex.it/wiki/hardware/system/execute-disable/) · [OS Guard and SMEP](https://feex.it/wiki/hardware/system/os-guard/)

## Sources and scope of this explanation

[Intel 64 and IA-32 Architectures Software Developer's Manual](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html) · [Linux kernel: Control-flow Enforcement Technology shadow stack](https://docs.kernel.org/arch/x86/shstk.html)

These references establish architectural behavior and software requirements. They do not independently verify every feature value on a linked hardware model page. For model support, use that page's manufacturer evidence and check the effective system configuration. This article does not supply a benchmark, certification or independent review date.

## Related

These entities connect to this article. Type is shown on every link.

[CET-IBT: Architecture reference](https://feex.it/wiki/hardware/system/cet-ibt/)[CET shadow stacks: Architecture reference](https://feex.it/wiki/hardware/system/cet-ss/)[Execute Disable (NX): Architecture reference](https://feex.it/wiki/hardware/system/execute-disable/)[OS Guard and SMEP: Architecture reference](https://feex.it/wiki/hardware/system/os-guard/)

## Sources and verification

Editorial ownership: Feex. No independent review date is recorded. [How we research](https://feex.it/wiki/research/).

- [Intel 64 and IA-32 Architectures Software Developer's Manual ](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html)· Volumes 1 and 2 describe the named instruction families and CPUID; Volume 3 describes state, paging, VMX and protection controls. Architecture documentation does not establish support for a particular model.
- [Linux kernel: Control-flow Enforcement Technology shadow stack ](https://docs.kernel.org/arch/x86/shstk.html)· Distinguishes hardware support, binary markers, loader enablement and active per-thread protection. Describes IBT and shadow stacks as separate facilities.

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Source: [Canonical Feex Wiki page](https://feex.it/wiki/hardware/system/cet/)

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