# VT-d

Architecture reference: Feex

Also called VT-d (DMA Remapping)

Intel VT-d provides directed-I/O facilities such as DMA remapping under platform and operating-system control. It is a platform feature distinct from CPU execution virtualization through VT-x.

## What you need to know

Intel VT-d provides directed-I/O facilities such as DMA remapping under platform and operating-system control. It is a platform feature distinct from CPU execution virtualization through VT-x.

## How it works

An I/O remapping unit translates and checks device DMA transactions using configured domains and translation structures. Interrupt remapping is a related capability with its own requirements. Firmware describes remapping hardware and device relationships to the OS, which must establish appropriate mappings and isolation.

## Where it is useful

A hypervisor can use DMA remapping when assigning a suitable device to a VM, while an OS can use it to restrict device access to memory. Device topology, isolation groups, reset behavior and driver support affect whether a particular assignment is safe and supported.

## How to check support and enablement

Check the system manufacturer's VT-d support and firmware configuration, the platform's DMAR description and the OS/hypervisor's IOMMU status. Verify the exact device's isolation and reset requirements before passthrough.

A virtualized deployment has several layers: physical capability, firmware permission, the active host hypervisor, exposed guest capabilities and guest OS support. Check the layer where the operation actually runs, including nested virtualization when relevant.

## What the feature does not establish

A VT-d field does not prove every PCIe device is independently assignable, that firmware tables are correct or that DMA protection is enabled. VT-x and EPT do not substitute for VT-d. Changing storage or remapping policy can affect active devices.

## Compatibility and performance in practice

CPU execution, guest memory translation and device DMA remapping are separate facilities. Do not infer passthrough or isolation from one virtualization field. Use the hypervisor's supported diagnostics and exact platform/device requirements.

## A practical verification checklist

1. Record the exact processor or platform model and the application, OS and runtime versions involved. Preserve the wording of the actual error or requirement.
2. Check the manufacturer reference for that exact model, then inspect the effective capability and enabled state in the environment where the program runs.
3. Compare every requirement of the selected binary or backend. A similarly named feature, alias or broad technology label is not enough.
4. Confirm the application selected the intended implementation. Use its documented diagnostics and a supported fallback when requirements are not met.
5. Make one supported change at a time and repeat the same workload. Keep the original configuration and recovery path available.

## If the feature is listed but software cannot use it

Start with the exact failing component. A hardware database describes recorded capability; the operating system or hypervisor can expose a different effective environment. An illegal-instruction error also needs investigation of the actual faulting instruction and binary build, because corruption or an unrelated unsupported instruction can produce a similar symptom.

Install the application, driver or runtime version supported for the exact platform, and use the vendor's documented baseline or fallback build if needed. A software update cannot create an instruction that the processor lacks. Firmware and security-policy changes should follow the system manufacturer's procedure and a recovery plan rather than a generic optimization recipe.

## Related features and useful distinctions

[IOMMU](https://feex.it/wiki/hardware/system/iommu/) · [VT-x](https://feex.it/wiki/hardware/system/vt-x/) · [Extended Page Tables (EPT)](https://feex.it/wiki/hardware/system/ept/)

## Sources and scope of this explanation

[Intel Virtualization Technology for Directed I/O Architecture Specification](https://cdrdv2-public.intel.com/831418/vt-directed-io-spec.pdf) · [Linux kernel: VFIO device access and IOMMU groups](https://docs.kernel.org/driver-api/vfio.html)

These references establish architectural behavior and software requirements. They do not independently verify every feature value on a linked hardware model page. For model support, use that page's manufacturer evidence and check the effective system configuration. This article does not supply a benchmark, certification or independent review date.

## Related

These entities connect to this article. Type is shown on every link.

[IOMMU: Architecture reference](https://feex.it/wiki/hardware/system/iommu/)[VT-x: Architecture reference](https://feex.it/wiki/hardware/system/vt-x/)[Extended Page Tables (EPT): Architecture reference](https://feex.it/wiki/hardware/system/ept/)

## Sources and verification

Editorial ownership: Feex. No independent review date is recorded. [How we research](https://feex.it/wiki/research/).

- [Intel Virtualization Technology for Directed I/O Architecture Specification ](https://cdrdv2-public.intel.com/831418/vt-directed-io-spec.pdf)· DMA-remapping architecture, translation domains, interrupt remapping and firmware reporting structures. Platform support must be established separately.
- [Linux kernel: VFIO device access and IOMMU groups ](https://docs.kernel.org/driver-api/vfio.html)· Explains isolation groups, device ownership and constraints relevant to passthrough. It is not a compatibility list for a particular motherboard.

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Source: [Canonical Feex Wiki page](https://feex.it/wiki/hardware/system/vt-d/)

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