# Intel Core i3-1320PRE Embedded CPU: Intel Dem still dey call am intel core i3-1320pre, core i3-1320pre, i3-1320pre, core-i3-1320pre Intel, Embedded CPU, Raptor Lake Intel Core i3-1320PRE na Intel processor wey get 8 CPU cores and 12 threads. ## Wetin you need know Intel Core i3-1320PRE na Intel processor wey get 8 CPU cores and 12 threads. Reference specifications wey dem record no be tested performance or operating-system compatibility verdict. Verify di exact model and platform wit di manufacturer. ## Specifications Numbers wey dey below follow di Feex Hardware Database record for dis SKU. Fields wey no get recorded value dey omitted. ### Processor | Manufacturer | Intel | | ------------ | ---------------------------------------- | | Family | Core i3 | | Architecture | Raptor Lake | | Generation | 13th Generation Intel Core i3 Processors | | Segment | Embedded | ### Cores and threads | CPU cores | 8 | | ------------------- | --- | | P-core-dem | 4 | | E-core-dem | 4 | | Threads | 12 | | Hybrid architecture | Yes | ### Clock speeds | Base frequency | 1.7 GHz | | ----------------------- | ------- | | Maximum turbo frequency | 4.5 GHz | ### Cache | L3 cache | 12 MB | | -------- | ----- | ### Memory | Supported types | DDR5, DDR4, LPDDR5, LPDDR4X | | --------------- | --------------------------- | | Maximum memory | 96 GB | | Memory channels | 2 | ### Package and power | Socket | FCBGA1744 | | -------------------- | ----------- | | Processor base power | 28 W | | PCIe | 20 lane-dem | ### Integrated graphics | Integrated graphics | Intel UHD Graphics for 13th Gen Intel Processors | | ------------------- | ------------------------------------------------ | ### Market Dem launch Intel Core i3-1320PRE for January 1, 2023 at USD 341 (price dem suggest for launch). | Launch date | January 1, 2023 | | ---------------------- | -------------------------------------- | | MSRP wey dem launch am | USD 341 (price dem suggest for launch) | | Model | i3-1320PRE | ### Features Intel Core i3-1320PRE record 40 instruction sets for inside dis sheet. | Instruction sets | [AES-NI](https://feex.it/wiki/l/pcm/hardware/system/aes-ni/), [AVX2](https://feex.it/wiki/l/pcm/hardware/system/avx2/), [AVX](https://feex.it/wiki/l/pcm/hardware/system/avx/), [AVX-VNNI](https://feex.it/wiki/l/pcm/hardware/system/avx-vnni/), [CET-IBT](https://feex.it/wiki/l/pcm/hardware/system/cet-ibt/), [CET-SS](https://feex.it/wiki/l/pcm/hardware/system/cet-ss/), [FMA](https://feex.it/wiki/l/pcm/hardware/system/fma/), [SHA](https://feex.it/wiki/l/pcm/hardware/system/sha/), [VAES](https://feex.it/wiki/l/pcm/hardware/system/vaes/), [64-bit (x86-64)](https://feex.it/wiki/l/pcm/hardware/system/x86-64/), [BMI1](https://feex.it/wiki/l/pcm/hardware/system/bmi1/), [BMI2](https://feex.it/wiki/l/pcm/hardware/system/bmi2/), [CLMUL / PCLMULQDQ](https://feex.it/wiki/l/pcm/hardware/system/pclmulqdq/), [F16C](https://feex.it/wiki/l/pcm/hardware/system/f16c/), [GFNI](https://feex.it/wiki/l/pcm/hardware/system/gfni/), [RDRAND](https://feex.it/wiki/l/pcm/hardware/system/rdrand/), [RDSEED](https://feex.it/wiki/l/pcm/hardware/system/rdseed/), [SSE4.1](https://feex.it/wiki/l/pcm/hardware/system/sse4-1/), [SSE4.2](https://feex.it/wiki/l/pcm/hardware/system/sse4-2/), [x86-64-v3](https://feex.it/wiki/l/pcm/hardware/system/x86-64-v3/), [ABM](https://feex.it/wiki/l/pcm/hardware/system/abm/), [ADX](https://feex.it/wiki/l/pcm/hardware/system/adx/), [CMPXCHG16B](https://feex.it/wiki/l/pcm/hardware/system/cmpxchg16b/), [Enhanced SpeedStep](https://feex.it/wiki/l/pcm/hardware/system/enhanced-speedstep/), [Fast Short Rep MOVS](https://feex.it/wiki/l/pcm/hardware/system/fast-short-rep-movs/), [FXSR](https://feex.it/wiki/l/pcm/hardware/system/fxsr/), [Invariant TSC](https://feex.it/wiki/l/pcm/hardware/system/invariant-tsc/), [LZCNT](https://feex.it/wiki/l/pcm/hardware/system/lzcnt/), [POPCNT](https://feex.it/wiki/l/pcm/hardware/system/popcnt/), [RDTSCP](https://feex.it/wiki/l/pcm/hardware/system/rdtscp/), [SSE](https://feex.it/wiki/l/pcm/hardware/system/sse/), [SSE2](https://feex.it/wiki/l/pcm/hardware/system/sse2/), [SSE3](https://feex.it/wiki/l/pcm/hardware/system/sse3/), [SSSE3](https://feex.it/wiki/l/pcm/hardware/system/ssse3/), [x86-64-v2](https://feex.it/wiki/l/pcm/hardware/system/x86-64-v2/), [XSAVE](https://feex.it/wiki/l/pcm/hardware/system/xsave/), [XSAVEOPT](https://feex.it/wiki/l/pcm/hardware/system/xsaveopt/), [MMX](https://feex.it/wiki/l/pcm/hardware/system/mmx/), [MOVBE](https://feex.it/wiki/l/pcm/hardware/system/movbe/) | | ---------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | | Security | [AES-NI](https://feex.it/wiki/l/pcm/hardware/system/aes-ni/), [Control-flow Enforcement (CET)](https://feex.it/wiki/l/pcm/hardware/system/cet/), [Execute Disable (NX)](https://feex.it/wiki/l/pcm/hardware/system/execute-disable/), [Boot Guard](https://feex.it/wiki/l/pcm/hardware/system/boot-guard/), [Hardware RNG](https://feex.it/wiki/l/pcm/hardware/system/hardware-rng/), [OS Guard](https://feex.it/wiki/l/pcm/hardware/system/os-guard/), [OS Guard (SMAP)](https://feex.it/wiki/l/pcm/hardware/system/smap/), [Mode-Based Execute Control](https://feex.it/wiki/l/pcm/hardware/system/mode-based-execute-control/) | | Virtualization | [Extended Page Tables (EPT)](https://feex.it/wiki/l/pcm/hardware/system/ept/), [VT-d (DMA Remapping)](https://feex.it/wiki/l/pcm/hardware/system/vt-d/), [VT-x (Hardware Virtualization)](https://feex.it/wiki/l/pcm/hardware/system/vt-x/) | | AI acceleration | [Deep Learning Boost](https://feex.it/wiki/l/pcm/hardware/system/deep-learning-boost/), [Gaussian Neural Accelerator](https://feex.it/wiki/l/pcm/hardware/system/gaussian-neural-accelerator/) | ## Compatibility | Socket | FCBGA1744 | | -------- | ----------------------------------------------------------------------------------------------- | | Board | Shared socket no mean automatic compatibility. Check di motherboard CPU list and BIOS revision. | | Memory | DDR5, DDR4, LPDDR5, LPDDR4X, up to 96 GB | | Graphics | Intel UHD Graphics for 13th Gen Intel Processors | Shared socket no mean automatic compatibility. Boards dey often need BIOS update before newer chip wey dey di same socket go fit post. Cooler clearance, VRM quality, and power limits matter just like di socket name. Read di memory list on di board. Di CPU fit list more standards pass wetin one motherboard go accept. CPU wey no get integrated graphics no need discrete graphics card every time. Some server motherboards dey provide separate management graphics controller. Check di motherboard and CPU documentation. ## Manufacturer-checked specifications ### Intel Core i3-1320PRE Dem check these fields against Intel's model-specific reference on 2026-10-29. Power ratings na manufacturer-defined metrics, no be measured system consumption. Other imported fields dem never independently verify dem again. | Code name | Raptor Lake | | ------------------------ | ----------- | | Manufacturer segment | Embedded | | CPU cores | 8 | | Performance core-dem | 4 | | Efficiency cores | 4 | | Threads | 12 | | Maximum turbo frequency | 4.5 GHz | | Base frequency | 1.7 GHz | | L3 cache | 12 MB | | Processor base power | 28 W | | Maximum turbo power | 64 W | | Manufacturer launch date | Q1'23 | | Maximum memory | 96 GB | | Memory channels | 2 | | Socket or package | FCBGA1744 | ## Related Dis entities connect to dis article. Type dey show for every link. [Raptor Lake: Architecture](https://feex.it/wiki/l/pcm/hardware/system/raptor-lake/)[Processors: Hardware](https://feex.it/wiki/hardware/cpu/) ## Sources and verification Imported reference. Source-specific checks dey beside di supported fields and citations. [How we dey do research](https://feex.it/wiki/research/). - [Feex Hardware Database ](https://foxhole.feex.it/cpu/intel-core-i3-1320pre)· Specification source wey dem use for dis sheet. CC BY 4.0. - [Intel: Intel Core i3-1320PRE specifications ](https://www.intel.com/content/www/us/en/products/sku/235072/intel-core-i31320pre-processor-12m-cache-up-to-4-50-ghz/specifications.html)· Dey support di fields for manufacturer-reference section; dem check am 2026-10-29. Source evidence SHA-256 49e595c84ba1. Dis check no dey verify every field wey dem import. ## Dis article make sense to you? Yes or no dey enough. Choose reason if you want, or add short note. Quick facts The short identity of dis page. Specs, sources, and the full story still dey inside the article. - **Manufacturer**: Intel **Family**: Core i3 **Architecture**: Raptor Lake **Socket**: FCBGA1744 **Launch**: 2023 Recorded source status: Imported reference: Editorial ownership: Feex. No independent review date dey recorded. --- Source: [Canonical Feex Wiki page](https://feex.it/wiki/l/pcm/hardware/cpu/intel-core-i3-1320pre/) [Developer guide](https://feex.it/wiki/developers/) | [API policy](https://feex.it/developers/api-policy/) | [Agent guidance](https://feex.it/wiki/llms.txt)