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NPT and RVI

Architecture referenceFeex

Also called NPT / RVI

NPT, Nested Page Tables, is AMD's second-stage guest memory translation facility, also associated with Rapid Virtualization Indexing, RVI. It is the AMD counterpart in purpose to Intel EPT.

What you need to know

NPT, Nested Page Tables, is AMD's second-stage guest memory translation facility, also associated with Rapid Virtualization Indexing, RVI. It is the AMD counterpart in purpose to Intel EPT.

How it works

Guest page tables first translate guest virtual to guest physical addresses. Nested page tables controlled by the hypervisor translate guest physical addresses to system physical addresses. Both translation stages and their permissions participate in a memory access, with defined fault and invalidation behavior.

Where it is useful

A VM can manage its own address spaces while the host maps guest memory into the machine's actual physical pages. A hypervisor must correctly handle mapping changes and translation caches rather than treating nested paging as a fixed static lookup.

How to check support and enablement

Enumerate the AMD SVM feature leaf for nested paging after confirming the extended leaf range and SVM support. Verify the hypervisor actually enables and supports the desired configuration, including any nested-guest requirements.

A virtualized deployment has several layers: physical capability, firmware permission, the active host hypervisor, exposed guest capabilities and guest OS support. Check the layer where the operation actually runs, including nested virtualization when relevant.

What the feature does not establish

NPT does not imply IOMMU device isolation, SEV or every large-page and nested-virtualization option. RVI is not an additional instruction that applications turn on. Reduced translation overhead is workload-dependent rather than a universal performance multiplier.

Compatibility and performance in practice

CPU execution, guest memory translation and device DMA remapping are separate facilities. Do not infer passthrough or isolation from one virtualization field. Use the hypervisor's supported diagnostics and exact platform/device requirements.

A practical verification checklist

  1. Record the exact processor or platform model and the application, OS and runtime versions involved. Preserve the wording of the actual error or requirement.
  2. Check the manufacturer reference for that exact model, then inspect the effective capability and enabled state in the environment where the program runs.
  3. Compare every requirement of the selected binary or backend. A similarly named feature, alias or broad technology label is not enough.
  4. Confirm the application selected the intended implementation. Use its documented diagnostics and a supported fallback when requirements are not met.
  5. Make one supported change at a time and repeat the same workload. Keep the original configuration and recovery path available.

If the feature is listed but software cannot use it

Start with the exact failing component. A hardware database describes recorded capability; the operating system or hypervisor can expose a different effective environment. An illegal-instruction error also needs investigation of the actual faulting instruction and binary build, because corruption or an unrelated unsupported instruction can produce a similar symptom.

Install the application, driver or runtime version supported for the exact platform, and use the vendor's documented baseline or fallback build if needed. A software update cannot create an instruction that the processor lacks. Firmware and security-policy changes should follow the system manufacturer's procedure and a recovery plan rather than a generic optimization recipe.

Sources and scope of this explanation

AMD CPUID Specification, publication 25481 · AMD64 Architecture Programmer's Manual, Volume 2: System Programming

These references establish architectural behavior and software requirements. They do not independently verify every feature value on a linked hardware model page. For model support, use that page's manufacturer evidence and check the effective system configuration. This article does not supply a benchmark, certification or independent review date.

Sources and verification

Editorial ownership: Feex. No independent review date is recorded. How we research.

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