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CET shadow stacks

Architecture referenceFeex

Also called CET-SS

CET shadow stacks provide protected return-address state to help detect corrupted control-flow returns. The processor's shadow-stack capability is only one prerequisite for an actively protected process.

What you need to know

CET shadow stacks provide protected return-address state to help detect corrupted control-flow returns. The processor's shadow-stack capability is only one prerequisite for an actively protected process.

How it works

A shadow stack holds a protected copy of return information alongside the ordinary execution stack. A protected return checks consistency according to the architecture's rules. The OS manages enablement, memory permissions and thread state, while runtimes must correctly handle exceptions and context transitions.

Where it is useful

A stack overwrite that changes an ordinary return address can produce a control-protection exception when it disagrees with the protected return state. A debugger or runtime must understand the shadow-stack environment rather than treat it as an ordinary writable stack.

How to check support and enablement

CPUID.07H.00H:ECX bit 7 enumerates shadow-stack capability. Use the OS's documented per-process or per-thread status interface to establish enablement. An unexplained crash warrants checking supported software updates and compatibility before changing protection policy.

Capability, enablement and enforcement must be checked separately. A processor can support a protection while the OS, application or virtual-machine policy does not activate it. A database support field is not an attestation of a running system.

What the feature does not establish

Shadow stacks do not establish IBT support, protect all application data or eliminate every control-flow attack. A CPU label does not prove that every executable and loaded library is covered under the OS's compatibility policy.

Compatibility and performance in practice

Keep the OS, firmware and affected runtime current. If a protection exposes a compatibility problem, use vendor diagnostics and supported updates first. A broad protection toggle can affect unrelated applications and should follow an explicit deployment and recovery policy.

A practical verification checklist

  1. Record the exact processor or platform model and the application, OS and runtime versions involved. Preserve the wording of the actual error or requirement.
  2. Check the manufacturer reference for that exact model, then inspect the effective capability and enabled state in the environment where the program runs.
  3. Compare every requirement of the selected binary or backend. A similarly named feature, alias or broad technology label is not enough.
  4. Confirm the application selected the intended implementation. Use its documented diagnostics and a supported fallback when requirements are not met.
  5. Make one supported change at a time and repeat the same workload. Keep the original configuration and recovery path available.

If the feature is listed but software cannot use it

Start with the exact failing component. A hardware database describes recorded capability; the operating system or hypervisor can expose a different effective environment. An illegal-instruction error also needs investigation of the actual faulting instruction and binary build, because corruption or an unrelated unsupported instruction can produce a similar symptom.

Install the application, driver or runtime version supported for the exact platform, and use the vendor's documented baseline or fallback build if needed. A software update cannot create an instruction that the processor lacks. Firmware and security-policy changes should follow the system manufacturer's procedure and a recovery plan rather than a generic optimization recipe.

Sources and scope of this explanation

Intel 64 and IA-32 Architectures Software Developer's Manual · Linux kernel: Control-flow Enforcement Technology shadow stack

These references establish architectural behavior and software requirements. They do not independently verify every feature value on a linked hardware model page. For model support, use that page's manufacturer evidence and check the effective system configuration. This article does not supply a benchmark, certification or independent review date.

Sources and verification

Editorial ownership: Feex. No independent review date is recorded. How we research.

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